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<div class="header">
  <div class="summary">
<a href="#define-members">Macros</a>  </div>
  <div class="headertitle">
<div class="title">Registers Constants<div class="ingroups"><a class="el" href="group__group__csd.html">CSD          (CAPSENSE&amp;trade; Sigma Delta)</a> &raquo; <a class="el" href="group__group__csd__macros.html">Macros</a></div></div>  </div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga8b23693ecf455c7d818abc7b67d1a7d7"><td class="memItemLeft" align="right" valign="top"><a id="ga8b23693ecf455c7d818abc7b67d1a7d7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga8b23693ecf455c7d818abc7b67d1a7d7">CY_CSD_REG_OFFSET_CONFIG</a>&#160;&#160;&#160;(offsetof(CSD_Type, CONFIG))</td></tr>
<tr class="memdesc:ga8b23693ecf455c7d818abc7b67d1a7d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga8b23693ecf455c7d818abc7b67d1a7d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5d948b13d5bd5f3aab3805b74fe99dfe"><td class="memItemLeft" align="right" valign="top"><a id="ga5d948b13d5bd5f3aab3805b74fe99dfe"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga5d948b13d5bd5f3aab3805b74fe99dfe">CY_CSD_REG_OFFSET_SPARE</a>&#160;&#160;&#160;(offsetof(CSD_Type, SPARE))</td></tr>
<tr class="memdesc:ga5d948b13d5bd5f3aab3805b74fe99dfe"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga5d948b13d5bd5f3aab3805b74fe99dfe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaca84758e14ab035129600253565a9f44"><td class="memItemLeft" align="right" valign="top"><a id="gaca84758e14ab035129600253565a9f44"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gaca84758e14ab035129600253565a9f44">CY_CSD_REG_OFFSET_STATUS</a>&#160;&#160;&#160;(offsetof(CSD_Type, STATUS))</td></tr>
<tr class="memdesc:gaca84758e14ab035129600253565a9f44"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gaca84758e14ab035129600253565a9f44"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga251ceceab01102ab286bc292050eb12a"><td class="memItemLeft" align="right" valign="top"><a id="ga251ceceab01102ab286bc292050eb12a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga251ceceab01102ab286bc292050eb12a">CY_CSD_REG_OFFSET_STAT_SEQ</a>&#160;&#160;&#160;(offsetof(CSD_Type, STAT_SEQ))</td></tr>
<tr class="memdesc:ga251ceceab01102ab286bc292050eb12a"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga251ceceab01102ab286bc292050eb12a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab3e408145e15407b999832c76346e0ac"><td class="memItemLeft" align="right" valign="top"><a id="gab3e408145e15407b999832c76346e0ac"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gab3e408145e15407b999832c76346e0ac">CY_CSD_REG_OFFSET_STAT_CNTS</a>&#160;&#160;&#160;(offsetof(CSD_Type, STAT_CNTS))</td></tr>
<tr class="memdesc:gab3e408145e15407b999832c76346e0ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gab3e408145e15407b999832c76346e0ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8a2a48dd055192d8263ff484a564b024"><td class="memItemLeft" align="right" valign="top"><a id="ga8a2a48dd055192d8263ff484a564b024"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga8a2a48dd055192d8263ff484a564b024">CY_CSD_REG_OFFSET_STAT_HCNT</a>&#160;&#160;&#160;(offsetof(CSD_Type, STAT_HCNT))</td></tr>
<tr class="memdesc:ga8a2a48dd055192d8263ff484a564b024"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
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<tr class="memitem:gaef8c4f4536c6cb3a7a3ca70cc97141c3"><td class="memItemLeft" align="right" valign="top"><a id="gaef8c4f4536c6cb3a7a3ca70cc97141c3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gaef8c4f4536c6cb3a7a3ca70cc97141c3">CY_CSD_REG_OFFSET_RESULT_VAL1</a>&#160;&#160;&#160;(offsetof(CSD_Type, RESULT_VAL1))</td></tr>
<tr class="memdesc:gaef8c4f4536c6cb3a7a3ca70cc97141c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gaef8c4f4536c6cb3a7a3ca70cc97141c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad29121fc32765c4021f9d1b283c6ea79"><td class="memItemLeft" align="right" valign="top"><a id="gad29121fc32765c4021f9d1b283c6ea79"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gad29121fc32765c4021f9d1b283c6ea79">CY_CSD_REG_OFFSET_RESULT_VAL2</a>&#160;&#160;&#160;(offsetof(CSD_Type, RESULT_VAL2))</td></tr>
<tr class="memdesc:gad29121fc32765c4021f9d1b283c6ea79"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gad29121fc32765c4021f9d1b283c6ea79"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8efd7cf093ccd409e60edb30db7b2510"><td class="memItemLeft" align="right" valign="top"><a id="ga8efd7cf093ccd409e60edb30db7b2510"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga8efd7cf093ccd409e60edb30db7b2510">CY_CSD_REG_OFFSET_ADC_RES</a>&#160;&#160;&#160;(offsetof(CSD_Type, ADC_RES))</td></tr>
<tr class="memdesc:ga8efd7cf093ccd409e60edb30db7b2510"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga8efd7cf093ccd409e60edb30db7b2510"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6acd77ce405ea93b0d14b08a9f52e117"><td class="memItemLeft" align="right" valign="top"><a id="ga6acd77ce405ea93b0d14b08a9f52e117"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga6acd77ce405ea93b0d14b08a9f52e117">CY_CSD_REG_OFFSET_INTR</a>&#160;&#160;&#160;(offsetof(CSD_Type, INTR))</td></tr>
<tr class="memdesc:ga6acd77ce405ea93b0d14b08a9f52e117"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga6acd77ce405ea93b0d14b08a9f52e117"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4bccccc9e145dbb3102244121598f86e"><td class="memItemLeft" align="right" valign="top"><a id="ga4bccccc9e145dbb3102244121598f86e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga4bccccc9e145dbb3102244121598f86e">CY_CSD_REG_OFFSET_INTR_SET</a>&#160;&#160;&#160;(offsetof(CSD_Type, INTR_SET))</td></tr>
<tr class="memdesc:ga4bccccc9e145dbb3102244121598f86e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga4bccccc9e145dbb3102244121598f86e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d672ab537cfdd238ed7cb340dca26e3"><td class="memItemLeft" align="right" valign="top"><a id="ga4d672ab537cfdd238ed7cb340dca26e3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga4d672ab537cfdd238ed7cb340dca26e3">CY_CSD_REG_OFFSET_INTR_MASK</a>&#160;&#160;&#160;(offsetof(CSD_Type, INTR_MASK))</td></tr>
<tr class="memdesc:ga4d672ab537cfdd238ed7cb340dca26e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga4d672ab537cfdd238ed7cb340dca26e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab8849d53c5cc96eb2e585ff4c48f954d"><td class="memItemLeft" align="right" valign="top"><a id="gab8849d53c5cc96eb2e585ff4c48f954d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gab8849d53c5cc96eb2e585ff4c48f954d">CY_CSD_REG_OFFSET_INTR_MASKED</a>&#160;&#160;&#160;(offsetof(CSD_Type, INTR_MASKED))</td></tr>
<tr class="memdesc:gab8849d53c5cc96eb2e585ff4c48f954d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gab8849d53c5cc96eb2e585ff4c48f954d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5759ce594efd7553a767e5fc75cdcb0a"><td class="memItemLeft" align="right" valign="top"><a id="ga5759ce594efd7553a767e5fc75cdcb0a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga5759ce594efd7553a767e5fc75cdcb0a">CY_CSD_REG_OFFSET_HSCMP</a>&#160;&#160;&#160;(offsetof(CSD_Type, HSCMP))</td></tr>
<tr class="memdesc:ga5759ce594efd7553a767e5fc75cdcb0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga5759ce594efd7553a767e5fc75cdcb0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae2bbd9281330169798de18215d011f9b"><td class="memItemLeft" align="right" valign="top"><a id="gae2bbd9281330169798de18215d011f9b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gae2bbd9281330169798de18215d011f9b">CY_CSD_REG_OFFSET_AMBUF</a>&#160;&#160;&#160;(offsetof(CSD_Type, AMBUF))</td></tr>
<tr class="memdesc:gae2bbd9281330169798de18215d011f9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gae2bbd9281330169798de18215d011f9b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7e6da7d38906d8083c2d06770a81bfde"><td class="memItemLeft" align="right" valign="top"><a id="ga7e6da7d38906d8083c2d06770a81bfde"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga7e6da7d38906d8083c2d06770a81bfde">CY_CSD_REG_OFFSET_REFGEN</a>&#160;&#160;&#160;(offsetof(CSD_Type, REFGEN))</td></tr>
<tr class="memdesc:ga7e6da7d38906d8083c2d06770a81bfde"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga7e6da7d38906d8083c2d06770a81bfde"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga44b663fc761f82d9ef7e82d4b62423e5"><td class="memItemLeft" align="right" valign="top"><a id="ga44b663fc761f82d9ef7e82d4b62423e5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga44b663fc761f82d9ef7e82d4b62423e5">CY_CSD_REG_OFFSET_CSDCMP</a>&#160;&#160;&#160;(offsetof(CSD_Type, CSDCMP))</td></tr>
<tr class="memdesc:ga44b663fc761f82d9ef7e82d4b62423e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga44b663fc761f82d9ef7e82d4b62423e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3042034d016a611fbbfaa89c444d5eeb"><td class="memItemLeft" align="right" valign="top"><a id="ga3042034d016a611fbbfaa89c444d5eeb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga3042034d016a611fbbfaa89c444d5eeb">CY_CSD_REG_OFFSET_SW_RES</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_RES))</td></tr>
<tr class="memdesc:ga3042034d016a611fbbfaa89c444d5eeb"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga3042034d016a611fbbfaa89c444d5eeb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaad30298f6a5584148a13f1385f69e502"><td class="memItemLeft" align="right" valign="top"><a id="gaad30298f6a5584148a13f1385f69e502"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gaad30298f6a5584148a13f1385f69e502">CY_CSD_REG_OFFSET_SENSE_PERIOD</a>&#160;&#160;&#160;(offsetof(CSD_Type, SENSE_PERIOD))</td></tr>
<tr class="memdesc:gaad30298f6a5584148a13f1385f69e502"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gaad30298f6a5584148a13f1385f69e502"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga141b8212e1558ed48b836938d8ddada5"><td class="memItemLeft" align="right" valign="top"><a id="ga141b8212e1558ed48b836938d8ddada5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga141b8212e1558ed48b836938d8ddada5">CY_CSD_REG_OFFSET_SENSE_DUTY</a>&#160;&#160;&#160;(offsetof(CSD_Type, SENSE_DUTY))</td></tr>
<tr class="memdesc:ga141b8212e1558ed48b836938d8ddada5"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga141b8212e1558ed48b836938d8ddada5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed04e8997311826f59c71c13da45f9b7"><td class="memItemLeft" align="right" valign="top"><a id="gaed04e8997311826f59c71c13da45f9b7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gaed04e8997311826f59c71c13da45f9b7">CY_CSD_REG_OFFSET_SW_HS_P_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_HS_P_SEL))</td></tr>
<tr class="memdesc:gaed04e8997311826f59c71c13da45f9b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gaed04e8997311826f59c71c13da45f9b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3256c97462c95fbd18756b66c8e97bfc"><td class="memItemLeft" align="right" valign="top"><a id="ga3256c97462c95fbd18756b66c8e97bfc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga3256c97462c95fbd18756b66c8e97bfc">CY_CSD_REG_OFFSET_SW_HS_N_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_HS_N_SEL))</td></tr>
<tr class="memdesc:ga3256c97462c95fbd18756b66c8e97bfc"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga3256c97462c95fbd18756b66c8e97bfc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae8c5a2642560f34d80f5e21127535b6b"><td class="memItemLeft" align="right" valign="top"><a id="gae8c5a2642560f34d80f5e21127535b6b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gae8c5a2642560f34d80f5e21127535b6b">CY_CSD_REG_OFFSET_SW_SHIELD_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_SHIELD_SEL))</td></tr>
<tr class="memdesc:gae8c5a2642560f34d80f5e21127535b6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gae8c5a2642560f34d80f5e21127535b6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0f9eb96bd2dc4b6dfbc458637082574e"><td class="memItemLeft" align="right" valign="top"><a id="ga0f9eb96bd2dc4b6dfbc458637082574e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga0f9eb96bd2dc4b6dfbc458637082574e">CY_CSD_REG_OFFSET_SW_AMUXBUF_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_AMUXBUF_SEL))</td></tr>
<tr class="memdesc:ga0f9eb96bd2dc4b6dfbc458637082574e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga0f9eb96bd2dc4b6dfbc458637082574e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe3e8855ad2bf11221cfcfd7aa6d1a8b"><td class="memItemLeft" align="right" valign="top"><a id="gafe3e8855ad2bf11221cfcfd7aa6d1a8b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gafe3e8855ad2bf11221cfcfd7aa6d1a8b">CY_CSD_REG_OFFSET_SW_BYP_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_BYP_SEL))</td></tr>
<tr class="memdesc:gafe3e8855ad2bf11221cfcfd7aa6d1a8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gafe3e8855ad2bf11221cfcfd7aa6d1a8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5804b79a434a9a0f17cd54de344293df"><td class="memItemLeft" align="right" valign="top"><a id="ga5804b79a434a9a0f17cd54de344293df"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga5804b79a434a9a0f17cd54de344293df">CY_CSD_REG_OFFSET_SW_CMP_P_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_CMP_P_SEL))</td></tr>
<tr class="memdesc:ga5804b79a434a9a0f17cd54de344293df"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga5804b79a434a9a0f17cd54de344293df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa308e1296df6df0e47ea13e654278479"><td class="memItemLeft" align="right" valign="top"><a id="gaa308e1296df6df0e47ea13e654278479"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gaa308e1296df6df0e47ea13e654278479">CY_CSD_REG_OFFSET_SW_CMP_N_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_CMP_N_SEL))</td></tr>
<tr class="memdesc:gaa308e1296df6df0e47ea13e654278479"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gaa308e1296df6df0e47ea13e654278479"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf5f99d7c7e2b7a908a1ca96f4be81a86"><td class="memItemLeft" align="right" valign="top"><a id="gaf5f99d7c7e2b7a908a1ca96f4be81a86"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gaf5f99d7c7e2b7a908a1ca96f4be81a86">CY_CSD_REG_OFFSET_SW_REFGEN_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_REFGEN_SEL))</td></tr>
<tr class="memdesc:gaf5f99d7c7e2b7a908a1ca96f4be81a86"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gaf5f99d7c7e2b7a908a1ca96f4be81a86"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga78a21aae88dc761623f25beef572205b"><td class="memItemLeft" align="right" valign="top"><a id="ga78a21aae88dc761623f25beef572205b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga78a21aae88dc761623f25beef572205b">CY_CSD_REG_OFFSET_SW_FW_MOD_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_FW_MOD_SEL))</td></tr>
<tr class="memdesc:ga78a21aae88dc761623f25beef572205b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga78a21aae88dc761623f25beef572205b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf9dc15aa7ad2433c793e5bb15e82927e"><td class="memItemLeft" align="right" valign="top"><a id="gaf9dc15aa7ad2433c793e5bb15e82927e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gaf9dc15aa7ad2433c793e5bb15e82927e">CY_CSD_REG_OFFSET_SW_FW_TANK_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_FW_TANK_SEL))</td></tr>
<tr class="memdesc:gaf9dc15aa7ad2433c793e5bb15e82927e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gaf9dc15aa7ad2433c793e5bb15e82927e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga91fb0ccd5681688f25b05f9a71bc0739"><td class="memItemLeft" align="right" valign="top"><a id="ga91fb0ccd5681688f25b05f9a71bc0739"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga91fb0ccd5681688f25b05f9a71bc0739">CY_CSD_REG_OFFSET_SW_DSI_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, SW_DSI_SEL))</td></tr>
<tr class="memdesc:ga91fb0ccd5681688f25b05f9a71bc0739"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga91fb0ccd5681688f25b05f9a71bc0739"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga687312ac2a77c5402f85fdf8628feb53"><td class="memItemLeft" align="right" valign="top"><a id="ga687312ac2a77c5402f85fdf8628feb53"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga687312ac2a77c5402f85fdf8628feb53">CY_CSD_REG_OFFSET_IO_SEL</a>&#160;&#160;&#160;(offsetof(CSD_Type, IO_SEL))</td></tr>
<tr class="memdesc:ga687312ac2a77c5402f85fdf8628feb53"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga687312ac2a77c5402f85fdf8628feb53"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ea8fd59161546cbfb45aff008caa7da"><td class="memItemLeft" align="right" valign="top"><a id="ga8ea8fd59161546cbfb45aff008caa7da"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga8ea8fd59161546cbfb45aff008caa7da">CY_CSD_REG_OFFSET_SEQ_TIME</a>&#160;&#160;&#160;(offsetof(CSD_Type, SEQ_TIME))</td></tr>
<tr class="memdesc:ga8ea8fd59161546cbfb45aff008caa7da"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga8ea8fd59161546cbfb45aff008caa7da"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaee93f18f13da384a098a6517fcd6e022"><td class="memItemLeft" align="right" valign="top"><a id="gaee93f18f13da384a098a6517fcd6e022"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gaee93f18f13da384a098a6517fcd6e022">CY_CSD_REG_OFFSET_SEQ_INIT_CNT</a>&#160;&#160;&#160;(offsetof(CSD_Type, SEQ_INIT_CNT))</td></tr>
<tr class="memdesc:gaee93f18f13da384a098a6517fcd6e022"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gaee93f18f13da384a098a6517fcd6e022"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5f9991af78d134613c7fce06bbfaa5f1"><td class="memItemLeft" align="right" valign="top"><a id="ga5f9991af78d134613c7fce06bbfaa5f1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga5f9991af78d134613c7fce06bbfaa5f1">CY_CSD_REG_OFFSET_SEQ_NORM_CNT</a>&#160;&#160;&#160;(offsetof(CSD_Type, SEQ_NORM_CNT))</td></tr>
<tr class="memdesc:ga5f9991af78d134613c7fce06bbfaa5f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga5f9991af78d134613c7fce06bbfaa5f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3724cefdb16a7c9c5920543e42f1f23e"><td class="memItemLeft" align="right" valign="top"><a id="ga3724cefdb16a7c9c5920543e42f1f23e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga3724cefdb16a7c9c5920543e42f1f23e">CY_CSD_REG_OFFSET_ADC_CTL</a>&#160;&#160;&#160;(offsetof(CSD_Type, ADC_CTL))</td></tr>
<tr class="memdesc:ga3724cefdb16a7c9c5920543e42f1f23e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga3724cefdb16a7c9c5920543e42f1f23e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf36a634527524e6162079d60396b0dcb"><td class="memItemLeft" align="right" valign="top"><a id="gaf36a634527524e6162079d60396b0dcb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#gaf36a634527524e6162079d60396b0dcb">CY_CSD_REG_OFFSET_SEQ_START</a>&#160;&#160;&#160;(offsetof(CSD_Type, SEQ_START))</td></tr>
<tr class="memdesc:gaf36a634527524e6162079d60396b0dcb"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:gaf36a634527524e6162079d60396b0dcb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1731f7308cf733bb2d39ea42caa6a1f3"><td class="memItemLeft" align="right" valign="top"><a id="ga1731f7308cf733bb2d39ea42caa6a1f3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga1731f7308cf733bb2d39ea42caa6a1f3">CY_CSD_REG_OFFSET_IDACA</a>&#160;&#160;&#160;(offsetof(CSD_Type, IDACA))</td></tr>
<tr class="memdesc:ga1731f7308cf733bb2d39ea42caa6a1f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga1731f7308cf733bb2d39ea42caa6a1f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7abf3a5f457d28ddb17bda6eec283dc7"><td class="memItemLeft" align="right" valign="top"><a id="ga7abf3a5f457d28ddb17bda6eec283dc7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__csd__reg__const.html#ga7abf3a5f457d28ddb17bda6eec283dc7">CY_CSD_REG_OFFSET_IDACB</a>&#160;&#160;&#160;(offsetof(CSD_Type, IDACB))</td></tr>
<tr class="memdesc:ga7abf3a5f457d28ddb17bda6eec283dc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">The register offset. <br /></td></tr>
<tr class="separator:ga7abf3a5f457d28ddb17bda6eec283dc7"><td class="memSeparator" colspan="2">&#160;</td></tr>
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